Paper Title
Design of Switchbox Router Using Neural Network

Abstract
In this paper, a new algorithm using maximum neural network for the topological via minimization problem in a switchbox is presented. The switchbox is the rectangular region allows its interconnection terminals on all four sides of the region. Maximum neural network with M-clusters for N-outputs is used to allocate M of two-terminal nets to N routing layers. This algorithm optimizes the terminal connectors into variable layers to minimize the number of via. This algorithm designed the digital hardware using VHDL, verified with Simulation tools and was fabricated by SK hynix 0.8μm CMOS process. The chip can solve the problem which contains the 10 terminal connectors and 2 layers. Keywords - FPGA, Neural Network, Router, Switch box, VLSI.