Paper Title
ANALYZING ESD RELIABILITY STRENGTHENING OF 40-V NLDMOS WITH DRAIN-SIDE PARASITIC SCRS

Abstract
Abstract - This paper evaluated the effects of current path variation on the electrostatic discharge (ESD) robustness of n-channel lateral diffused MOSFET (nLDMOS) devices with drain side modulation fabricated in a 0.18 μm 40 V process. Through transmission-line-pulsing measurement, the secondary breakdown current (It2) of an nLDMOS with a drain side embedded silicon-controlled rectifier (SCR) structure and a pnp arrangement (DUT-2) was determined to increase from 2.498 A to >7 A (enhancement of at least 180%), compared with the reference nLDMOS device. The trigger voltage (Vt1) also decreased; in particular, the SCR (DUT-3) had the lowest reduction in Vt1. Moreover, the Ron value of the pure LDMOS (DUT-4) increased, and the It2 value also increased from 2.498 A to 3.043 A (approximately 21.8% improvement). The results show that the It2 (ESD immunity) value of the reference nLDMOS was lower than those of the pure SCR and pure nLDMOS constituting the nLDMOS-SCR (pnp arrangement); therefore, the It2 value of the composite nLDMOS-SCR (pnp) device was higher than that of the reference nLDMOS. Keywords - Electrostatic discharge (ESD), Holding voltage (Vh), n-channel lateral-diffused MOSFET (nLDMOS), Secondary breakdown current (It2), Silicon-controlled rectifier (SCR), Trigger voltage (Vt1).